An active matrix-type display device has been known in the past in which a plurality of scanning signal lines and a plurality of video signal lines are disposed in a grid, and a plurality of pixel circuits are disposed in a matrix so as to correspond to the intersections of these signal lines. An active matrix-type display device is provided with a scanning-signal-line driving circuit which drives the scanning signal lines and a video-signal-line driving circuit which drives video signal lines. The scanning signal lines, video signal lines, scanning-signal-line driving circuit, and video-signal-line driving circuit are also called gate lines, source lines, a gate driver circuit, and a source driver circuit, respectively.
The scanning-signal-line driving circuit includes a shift register which operates based on a clock signal in order to sequentially select each of the scanning signal lines for a specified time. A specified fixed potential and a clock signal are supplied to each stage of the shift register in order to cause this shift register to operate. Various types of control signal (for example, a clear signal for initiation and a control signal for specifying a shift direction) may also be supplied to each stage of the shift register.
Furthermore, a method for forming a scanning-signal-line driving circuit integrally on a display panel formed with pixels (pixel circuits) is known as a method for reducing the size of an active matrix-type display device. The display panel formed integrally with the scanning-signal-line driving circuit is also called a gate driver monolithic panel. In cases where a scanning-signal-line driving circuit is formed on a display panel as an integral unit, the scanning-signal-line driving circuit is disposed in the outer periphery portion (hereinafter referred to as frame) of the area where the pixels are disposed (see FIG. 2, which will be described later). In such cases, the shift register is disposed near the area where the pixels are disposed, and trunk lines for supplying a fixed potential, a clock signal, and the like to each stage of the shift register are disposed on the outside of the shift register along an outer edge of the display panel. Moreover, branch lines are disposed in order to connect the trunk lines and each stage of the shift register.
Note that the following related art documents are known in relation to the invention of the present case. Various types of scanning-signal-line driving circuit are described in Patent Documents 1 to 7. It is indicated in Patent Documents 1 and 2 that a branch line CKj connected to a trunk line for a clock signal CLK2 is connected to two adjacent stages STj−1 and STj within a single shift register as shown in FIG. 24.